phase multiplier
英 [feɪz ˈmʌltɪplaɪə(r)]
美 [feɪz ˈmʌltɪplaɪər]
网络 相位倍增器
双语例句
- The relationship between two phase multiplier and local oil concentration shows strong linear dependency and slope ratios at different quality are quite equivalent, while the relationship between penalty factor and nominal oil concentration, local oil concentration and quality is not pronounced.
研究结果表明：基于制冷剂-润滑油混合物性的两相增强因子与局部油浓度具有良好的线性相关度，不同干度下斜率变化一致性良好； - The two phase multiplier with local refrigerant-oil mixture properties can reflect the oil influence on refrigerant heat transfer accurately and physically.
采用局部油浓度下的制冷剂-润滑油混合物性计算得到的两相换热增强因子能较好地反映润滑油对制冷剂流动沸腾换热的影响。 - Direct Digital Synthesizer is characterized by high frequency resolution, low phase noise and excellent frequency spectrum, which can be applied to the design of practicality circuit with the Multiplier.
直接数字式频率合成器具有频率分辨力高，相位噪声低，频谱好的优点。 - On the basis of experiment deta which checked by theoretical calculation proved that both the static and dynamic phase errors of the phase locked frequency multiplier are quite small and can certainly be used on high precision measuring instruments as well as other mechanical precision equipments.
本文在实验数据的基础上用理论计算来证明锁相倍分频器的静态相位误差和动态相位误差都很小，完全可在高精度测量仪器或其他高精度机械装置上被采用。 - This article studies the low noise frequency multiplier of current type, the signal of which is the phase closing coupling transmission when the frequency signal passes its zero-crossing points, It also gives an account of the design in the course of studying the frequency multiplier.
本文论述电流型低噪声倍频器激励信号与输出信号在过零交叉点时的相位紧密耦合传输，以及该倍频器研究中的设计考虑。 - A UHF phase locked loop frequency multiplier IC is developed based on the existing IC process conditions in China.
为适应星载测控系统小型化、集成化和低功耗的需要，根据国内集成电路工艺条件，设计并制作了一种特高频锁相倍频集成电路。 - In this way, the design of unit phase generated carrier ( PGC) homodyne demodulation circuits is completed, including analogue operations such as signal mixer, lowpass filter, highpass filter, differentiator, integrator, multiplier, subtracter, and so on.
在这一思想的指导下完成了相位载波（PGC）零差解调电路各个单元的硬件设计，包括信号的混频，低通滤波，高通滤波，微分，积分，相乘，相减等模拟运算。 - Several current conveyor functional circuits such as simulated inductors, the first-order slope equilibrator and the first-order phase equilibrator are presented. The E type frequency dependent negative resistor, capacitor multipliers, analog multiplier and amplitude modulation using current conveyor are first presented.
提出了若干电流传送器功能块电路，如仿真电感、一阶斜坡均衡器和一阶相位均衡器，首次提出了基于电流传送器的E型频变负阻、电容倍增器、模拟乘法器和幅度调制器。 - Experiment on error analysis of a high Precision worm measuring instrument with phase locked frequency multiplier
高精度蜗杆检查仪中的锁相倍分频器误差实验分析 - A Design of Digital Phase& locked Frequency Multiplier
全数字化锁相倍频器的设计 - The chapter 4 discuss some question of the circuit using programmable device like digital phase locked loop and digital frequency multiplier, it can increase the way of circuit design.
第四章探讨了运用可编程技术设计数字锁相环和数字倍频器的相关问题，为以后电路设计拓展更多的方法。 - Design of IP core: transfer the algorithm model into IP modules. ( 1) The whole IP core is combined of three functional modules, digital LPF, amplitude/ phase solution module and signed multiplier module.
IP模块设计：将已通过仿真的算法模型，转换成IP模块。（1）整个IP模块分成三个功能模块&数字低通滤波模块、幅度/相位求解模块和有符号小数乘法模块。 - In the present method, the phase modulation for the output signal of the grating sensor is conducted, and then the modulated signal is subdivided in phase-locking frequency multiplier after band-pass filtrating.
该方法将光栅传感器的输出信号进行相位调制，经带通滤波后再送入锁相倍频器细分。